E-MRS 2017 Spring Meeting

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22.-26.05.2017, Strasbourg, France

D. Noll, U. Schwalke,
Evaluation of Metal Catalysts for Growth of Nanocrystalline Graphene for Gas Sensing

Abstract – Since its first practical evidence in 2004 graphene has shown a lot of astonishing properties. As a consequence of being a two-dimensional material, it has the highest surface-to-volume ratio making it an interesting candidate for sensing applications. Despite that applications using graphene are still rare. By means of catalytic chemical vapor deposition (CCVD) of in-situ graphene, we show an easy method for the direct fabrication of field effect transistors (FETs) from structured, electrically disconnected metal catalyst sites. These metal catalyst sites are finally connected by lateral growth of nanocrystalline graphene during the CCVD process yielding the final device structures. Here we report on the utilization of different thin film metal catalyst systems, encapsulating a thin PMMA layer, for the growth of large area FETs. Output characteristics for the devices were recorded by electrical testing in atmospheric environment, showing different growth ranges and electrical characteristics for the various catalyst systems. Finally, the largest fabricated devices have been tested for humidity sensitivity in a resistive configuration.


Vergangene Termine

Design & Technology of Integrated Systems 2017

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04.-06.04.2017, Palma de Mallorca, Spain

D. Noll, U. Schwalke,
Feasibility Study of In-situ Grown Nanocrystalline Graphene for Humidity Sensing

Abstract – The application of in-situ transfer-free nanocrystalline graphene grown by polymer enhanced catalytic chemical vapor deposition for sensing humidity in an atmospheric environment is investigated by electrical testing. Exposure of the graphene devices to humidity enriched air leads to a relative resistance change of an absolute value of up to 3.5%. Furthermore, post application of a hydrophobic hexamethyldisilazane self-assembled monolayer onto the graphene transistors is attempted leading to a shift of the charge neutrality point towards zero potential. Yet, our devices show more pronounced rayleigh scattering after the self-assembled monolayer application, decreasing the current by a factor of 3.

T. Krauss, F. Wessely, Udo Schwalke,
Fabrication and Simulation of Electrically Reconfigurable Dual Metal-gate Planar Field-effect Transistors for Dopant-free CMOS

Abstract – In this paper, we illustrate by simulation and extend our previous work by demonstration of fabricated devices of electrostatically doped, reconfigurable planar field-effect-transistors with dual work function metal gates. The technological cornerstones for this dual-gated general purpose FET contain Schottky S/D junctions on a silicon-on-insulator substrate. The transistor type, i.e. n-type or p-type FET, is electrically selectable in operation by applying a control-gate voltage which significantly increases the versatility and flexibility in the design of digital integrated circuits.