Zum Tode von Prof. Dr. Hans Strack
230th Meeting of the Electrochemical Society
02.-07.10.2016, Honolulu, HI, USA
The ISTN participates with three presentations in the 230th Meeting of the Electrochemical Society.
Symposium H07: Emerging Nanomaterials and Devices
Lead organizer: Prof. U. Schwalke
M. Keyn, T. Krauss, A. Kramer, U. Schwalke
Evaluation of different high k materials for in situ growth of carbon nanotubes
Abstract – In this work we investigate the in situ growth of carbon nanotubes (CNTs) on different dielectric stacks for use in discrete field-effect transistor devices. While CNT growth is demonstrated on all stacks, only devices fabricated on atomic layer deposited aluminum oxide show sufficiently reliable gate dielectrics. Electrical burn pulses are applied to the devices to selectively remove undesired metallic CNTs in order to obtain proper transistor behavior with an on/off current ratio of five orders of magnitude.
T. Krauss, F. Wessely, U. Schwalke
Favorable combination of schottky Barrier and junctionless properties in field-effect transistors for high temperature applications
Abstract – High-temperature capable transistors are of great interest for industrial applications, for instance, oil & gas and geothermal exploration, avionic, space, automotive and energy conversion. Especially, energy conversion electronics using wide-bandgap power transistors, i.e. SiC- or GaN-based FET, in combination with high-temperature silicon gate-driver circuits can significantly increase system efficiency and reduce costs. Our improved planar virtually dopant-free silicon-based double gate SOI FET with reactively sputtered WTiNx front-gate electrodes demonstrates ultra-low drain leakage currents at high-temperatures opening a path to record operating temperatures for silicon-based FET devices.
D. Noll, U. Schwalke
Enhancement of the extent of in situ transfer-free few-layer graphene by solid carbon source for use in gas sensor applications
Abstract – Enhancement of the extent of transfer-free few-layer graphene has been achieved by the introduction of an additional solid carbon source into our silicon-CMOS compatible hydrocarbon CCVD process. A fivefold increase of graphene surface coverage is demonstrated by electrical testing of field-effect transistors showing typical few-layer graphene characteristics as have been reported elsewhere. Full functionality has been achieved up to a channel length of 10 µm. Furthermore, contact-mode conductive atomic force microscopy has been performed, confirming the presence of a conductive surface in the absence of other carbon allotropes like CNTs. However, microscopic electric defects can be seen on this surface. Finally, basic gas sensing properties of a graphene field-effect transistor are presented.
Design & Technology of Integrated Systems 2016
12.-14.04.2016, Istanbul, Turkey
Member of the Programm Commitee & Session chair: Prof. U. Schwalke
D. Noll, U. Schwalke
Investigation of Transfer-free Catalytic CVD Graphene on SiO2 by Means of Conductive Atomic Force Microscopy
Abstract – Transfer-free graphene on SiO2 has been produced by catalytic chemical vapor deposition (CCVD) using an additional PMMA carbon source. During our CCVD process the graphene grows laterally, extending beyond prestructured metal catalyst perimeters, covering part of the SiO2 surface. The such grown graphene has been investigated by atomic force microscopy (AFM) showing a smooth surface with a roughness of RMS ≈ 0.346 nm. However, by means of conductive AFM microscopic defects as well as graphene layer edges can be found in the graphene ﬁlm. An electrical characterization of a ﬁeld effect device shows a typical few-layer graphene subthreshold characteristic.
International Conference on Micro & Nano Electronic Systems
21.-24.03.2016, Leipzig, Germany
Part of: 13th International Multi-Conference on Systems, Signals and Devices
T. Krauss, F. Wessely, U. Schwalke,
Electrically Reconfigurable Dual Metal-gate Planar Field-effect Transistor for Dopant-free CMOS
Abstract – In this paper, we demonstrate by simulation the feasibility of electrostatically doped and therefore reconfigurable planar field-effect-transistor (FET) structure which is based on our already fabricated and published Si-nanowire (SiNW) devices. The technological cornerstones for this dual-gated general purpose FET contain Schottky S/D junctions on a silicon-on-insulator (SOI) substrate. The transistor type, i.e. n-type or p-type FET, is electrically selectable on the fly by applying an appropriate control-gate voltage which significantly increases the versatility and flexibility in the design of digital integrated circuits.
D. Noll, U. Schwalke
PMMA-enhancement of The Lateral Growth of Transfer-free In Situ CCVD Grown Graphene
Abstract – In this paper we demonstrate the enhancement of the lateral growth of in situ grown catalytic CVD graphene by the introduction of an additional solid carbon source. The fabricated ﬁeld effect devices show few-layer graphene behavior with an on/off-current ratio of a factor 5, up to a nominal channel length of 10µm. The prolonged growth of graphene enables the direct growth of larger devices. Furthermore sheet resistivity measurements using a modiﬁed greek cross structure are reported, extracting a sheet resistivity of PMMA-enhanced in situ grown graphene of 58kOhm.