News-Archiv 2012

Junior Euromat 2012

JuniorEuromat 2012

23.-27.07.2012, Lausanne, Switzerland

Topic N – Nanostructured Materials

M. Keyn, F. Wessely, U. Schwalke
Large-scale Parallelization of In Situ CCVD Grown Carbon Nanotubes for Power Devices

Abstract – In this work we investigate large-scale parallelization of carbon nanotubes for use in power device applications. On the basis of a process which grows thousands of carbon nanotubes (CNTs) by means of catalytic chemical vapor deposition (CCVD) we will show that CNTs are capable to provide a sufficiently high current to drive a light-emitting diode (LED) when parallelization is used. The process utilizes a custom made lithographic mask to fabricate one pair of source / drain contacts on a single wafer. When connected to a LED the system can be switched on and off by applying a backgate voltage.

Boron doped silicon wafers are used as substrates. After wet chemical cleaning they are thermally oxidized in dry atmosphere to grow the gate oxide. On top a catalytic double layer of aluminum and nickel is deposited using e-beam evaporation. During annealing the uniform nickel layer turns into discrete nano-clusters whereas the aluminum is converted into a dielectric (AlxOy). Subsequently CNTs are grown in situ by means of CCVD using a methane feedstock. To prevent pyrolysis and deposition of unwanted carbon compounds hydrogen is also fed into the reactor. Finally palladium is deposited using e-beam evaporation and patterned by lift-off lithography to form the source / drain contacts.

The resulting structure is a single large-area carbon nanotube field-effect transistor (CNTFET) consisting of two semi-circular source / drain contact pads with a gap in between. All CNTs lying within this gap and having a sufficient length act as channel in this CNTFET. Since CNTs can be semi-conducting as well as metallic, all metallic CNTs have to be destroyed by a short electrical burn-pulse to prevent high leakage currents.

4th International Conference Smart Materials, Structures and Systems

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10.-14.06.2012, Montecatini Terme, Italy

Session A-13.3 – Electronic, Spintronic, Optical and Sensing Applications

P.J. Wessely, F. Wessely, E. Birinci, B. Riedinger, U. Schwalke
In-Situ CCVD Grown Graphene Transistors with Ultra-High On/Off-Current Ratio in Silicon CMOS Compatible Processing

Abstract – We invented a novel method to fabricate graphene transistors on oxidized silicon wafers without the need to transfer graphene layers. By means of catalytic chemical vapor deposition (CCVD) the in-situ grown monolayer graphene field-effect transistors (MoLGFETs) and bilayer graphene transistors (BiLGFETs) are realized directly on oxidized silicon substrate, whereby the number of stacked graphene layers is determined by the selected CCVD process parameters. In-situ grown MoLGFETs exhibit the expected Dirac point together with the typical low on/off-current ratios between 16 (hole conduction) and 8 (electron conduction), respectively. In contrast, our BiLGFETs possess unipolar p-type device characteristics with an extremely high on/off-current ratio up to 107 exceeding previously reported values by several orders of magnitude. We explain the improved device characteristics by a combination of effects, in particular graphene-substrate interactions, hydrogen doping and Schottky-barrier effects at the source/drain contacts as well. Besides the excellent device characteristics, the complete CCVD fabrication process is silicon CMOS compatible. This will allow the usage of BiLGFETs for digital applications in a hybrid silicon CMOS environment.

Graphene Week 2012

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04.-08.06.2012, Delft, Netherlands

Session on Tuesday (June 5th) – Materials & Transport

P.J. Wessely, F. Wessely, E. Birinci, B. Riedinger, U. Schwalke
CCVD Assisted and Transfer-Free Fabrication of Graphene Devices

Abstract – We invented a novel transfer-free method to fabricate graphene transistors on oxidized silicon wafers. By means of catalytic chemical vapor deposition (CCVD) the in-situ grown monolayer graphene field-effect transistors (MoLGFETs) and bilayer graphene transistors (BiLGFETs) are realized directly on oxidized silicon substrate, whereby the number of stacked graphene layers is determined by the selected CCVD process parameters, e.g. temperature and gas mixture. To achieve a suitable bandgap within graphene while avoiding problems with GNR-fabrication, one can use bilayer graphene (BiLG) instead of monolayer graphene for device fabrication. Despite the large device area a bandgap can be induced in BiLG by applying an electrical field perpendicular to the layer. Additional effects, like intensive interactions between bilayer graphene and silicon dioxide are supposed to further enhance the bandgap. Such intensive interactions may develop during the growth of the bilayer graphene on the silicon dioxide at moderate temperatures (800-900 °C) under well defined ambient conditions within a CCVD chamber.

Design & Technology of Integrated Systems 2012

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16.-18.05.2012, Gammarth, Tunisia

The ISTN participates with five presentations in this year's International Conference on Design & Technology of Integrated Systems in the Nanoscale Era.

Keynote Presentation

U. Schwalke
Nanoelectronics: From Silicon to Carbon

Abstract – In the future of nanoelectronics, the use of pure silicon based planar devices will not be possible anymore since the limits of silicon downscaling are approaching. Carbon seems to be a great alternative to build high performance electronic devices. Carbon nanotube field-effect transistors can be used as active device in integrated circuits, as memory cell in numerous applications. More recently, graphene-based transistors are emerging as another potential candidate to extend and eventually replace the traditional planar MOSFET structure. This presentation will provide a comprehensive overview on device downscaling and materials issues along the road to nanoelectronics from silicon to graphene.


Special Session „Nanoelectronics“

F. Wessely, T. Krauss, U. Schwalke
Dopant-free CMOS: A Cew Device Concept

Abstract – In this paper we report on a newly developed multi-gate nanowire (NW) based field-effect device (NWFET) where the transistor type is freely selectable by the application of a control-voltage, adding to design flexibility in integrated circuit fabrication. Moreover, the midgap Schottky barrier source and drain contacts of the NWFET make it feasible for the use in high temperature environments, since the devices posses both stability against high temperatures and low OFF-state current at the same time. This makes the presented NWFET a multi-purpose device for many specific circuit applications.


P.J. Wessely, F. Wessely, E. Birinci, B. Riedinger, U. Schwalke
On/Off-Current Ratios of Transfer-Free Bilayer Graphene FETs as a Function of Temperature

Abstract – In this paper we report on a novel method to fabricate graphene transistors directly on oxidized silicon wafers without the need to transfer graphene. By means of catalytic chemical vapor deposition (CCVD) the in-situ grown bilayer graphene transistors (BiLGFETs) are realized directly on oxidized silicon substrate. These BiLGFETs possess unipolar p-type device characteristics with an extremely high on/off-current ratio between 1•106 and 1•107 at room temperature [1, 2], exceeding previously reported values by several orders of magnitude. Furthermore, when increasing the ambient temperature to 200 °C, the on/off-current ratio only degrades by one order of magnitude for BiLGFETs. Besides the excellent device characteristics, the complete CCVD fabrication process is silicon CMOS compatible. This will allow a simple and low-cost integration of graphene devices for nanoelectronic applications in a hybrid silicon CMOS environment.


U. Schwalke, P.J. Wessely, F. Wessely, M. Keyn, L. Rispal
Nanoelectronics: From Silicon to Graphene

Abstract – In the future of nanoelectronics, the use of pure silicon based planar devices will not be possible anymore since the limits of silicon downscaling are approaching. Carbon seems to be a great alternative to build high performance electronic devices. Carbon nanotube field-effect transistors can be used as active device in integrated circuits, as memory cell in numerous applications. More recently, graphene-based transistors are emerging as another potential candidate to extend and eventually replace the traditional planar MOSFET structure. This presentation will provide a comprehensive overview on device downscaling and materials issues along the road to nanoelectronics from silicon to graphene.


Poster Presentation

M. Keyn, P.J. Wessely, F. Wessely, L. Rispal, J. Palm, U. Schwalke
Feasibility Study on In Situ CCVD Grown CNTs For Feld-Effect Power Device Applications

Abstract – In this paper we investigate the feasibility of carbon nanotubes (CNTs) for power applications. On the basis of a process which fabricates thousands of field-effect transistors (CNTFETs) by means of catalytic chemical vapor deposition (CCVD) we will show that CNTFETs are capable to provide a sufficiently high current to drive a light-emitting diode (LED).

E-MRS 2012 Spring Meeting

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15.-17.05.2012, Strasbourg, France

P.J. Wessely, F. Wessely, E. Birinci, B. Riedinger, U. Schwalke
In-Situ CCVD Grown Bilayer Graphene on Silicon Dioxide Substrate for Field Effect Device Applications

Abstract – We invented a novel method to fabricate graphene transistors on oxidized silicon wafers without the need to transfer graphene layers. To stimulate the growth of graphene layers on oxidized silicon a catalyst system of nanometer thin aluminum/nickel double layer is used. This catalyst system is structured via liftoff before the wafer enters the catalytic chemical vapor deposition (CCVD) chamber. In the subsequent methane based growth process monolayer graphene field-effect transistors (MoLGFETs) and bilayer graphene transistors (BiLGFETs) are realized directly on oxidized silicon substrate, whereby the number of stacked graphene layers is determined by the selected CCVD process parameters, e.g. temperature and gas mixture. To achieve a suitable bandgap within graphene one can use bilayer graphene instead of monolayer graphene for device fabrication in combination with electrical fields applied perpendicular to bilayer graphene. In-situ CCVD grown BiLGFETs exhibit ultra-high on/off-current ratios of 107 at room temperature, exceeding previously reported values by several orders of magnitude. We explain the improved device characteristics by a combination of effects, in particular graphene-substrate interactions, hydrogen doping and Schottky-barrier effects at the source/drain contacts as well. In-situ CCVD grown BiLGFETs will allow a simple and low-cost integration of graphene devices for nanoelectronic applications in a hybrid silicon CMOS environment.

221st Meeting of the Electrochemical Society

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06.-11.05.2012, Seattle, WA, USA

Invited Talk

P.J. Wessely, F. Wessely, E. Birinci, B. Riedinger, U. Schwalke
On/Off-Current Ratios of In-Situ CCVD Grown Bilayer Graphene FETs as a Function of Temperature

Abstract – In this paper we report on a novel method to fabricate graphene transistors directly on oxidized silicon wafers without the need to transfer graphene. By means of catalytic chemical vapor deposition (CCVD) the in-situ grown bilayer graphene transistors (BiLGFETs) are realized directly on oxidized silicon substrate. These BiLGFETs possess unipolar p-type device characteristics with an extremely high on/off-current ratio between 1•106 and 1•107 at room temperature, exceeding previously reported values by several orders of magnitude. Furthermore, when increasing the ambient temperature to 200 °C, the on/off-current ratio only degrades by one order of magnitude for BiLGFETs. Besides the excellent device characteristics, the complete CCVD fabrication process is silicon CMOS compatible. This will allow a simple and low-cost integration of graphene devices for nanoelectronic applications in a hybrid silicon CMOS environment.

Graphene 2012

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10.-13.04.2012, Brussels, Belgium

P.J. Wessely, F. Wessely, E. Birinci, B. Riedinger, U. Schwalke
Transfer-Free Grown Bilayer Graphene Transistors with Ultra-High On/Off-Current Ratio

Abstract – In this paper we report on monolayer graphene transistors (MoLGFETs) and bilayer graphene field effect transistors (BiLGFETs) which grow transfer-free on oxidized silicon wafers. By means of catalytic chemical vapor deposition (CCVD) in-situ grown MoLGFETs and BiLGFETs, respectively, are realized directly on oxidized silicon substrate, whereby the number of stacked graphene layers is determined by the selected CCVD process parameters, e.g. temperature and gas mixture. First experimental evidence demonstrating the feasibility of this transfer-free graphene growth method has already been published in November 2009 [1, 2]. The results of a Fourier-analysis of transmission electron microscopy (TEM) data of a fewlayer graphene sample revealed the crystalline properties of the graphene multilayer more in detail as published in April 2011 [3]. In fact, the observed interplanar spacing of 3.5 Å is a strong evidence for the existence of fewlayer graphene grown by means of CCVD. Furthermore, the combination of atomic force microscopy examination, Raman spectroscopy as well as extensive electrical characterization of graphene structures on silicon dioxide confirms the suitability of this novel in-situ CCVD growth process [4, 5, 6].

Spring Meeting & Exhibit 2012 of the Materials Research Society

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09.-13.04.2012, San Francisco, CA, USA

P.J. Wessely, F. Wessely, E. Birinci, U. Schwalke
In-Situ CCVD Silicon CMOS Compatible Processing of Bilayer Graphene Transistors with Ultra-High On/Off-Current Ratio

Abstract – We invented a novel method to fabricate graphene transistors on oxidized silicon wafers without the need to transfer graphene layers. By means of catalytic chemical vapor deposition (CCVD) the in-situ grown monolayer graphene field-effect transistors (MoLGFETs) and bilayer graphene transistors (BiLGFETs) are realized directly on oxidized silicon substrate, whereby the number of stacked graphene layers is determined by the selected CCVD process parameters, e.g. temperature and gas mixture. To achieve a suitable bandgap within graphene while avoiding problems with GNR-fabrication, one can use bilayer graphene (BiLG) instead of monolayer graphene for device fabrication. Despite the large area a bandgap can be induced in BiLG by applying an electrical field perpendicular to the layer.

Artikel im Dieburger Anzeiger und in der Offenbach-Post

Zeitung 2012 - P.J. Wessely 1
Zeitung 2012 - P.J. Wessely 2

In den Ausgaben vom 3. März 2012 sind jeweils Artikel im Dieburger Anzeiger und in der Offenbach-Post erschienen.














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